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General Information

Job Title
Senior Design Verification Engineer
Job ID
17926
Country
Armenia
City
Yerevan
Date Posted
15-Jun-2026
Job Category
Engineering
Job Subcategory
R&D Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent enough time in verification to know that the real work is not in running tests, it is in building the right tests, the ones that expose the corner cases and timing violations that only surface when three subsystems interact under load. You think in coverage metrics and failure modes, and when a testbench flags an issue, you do not just log it and move on, you dig into waveforms, trace signals back through the design hierarchy, and figure out whether you are looking at a real bug or an artifact of how the test was written. Debugging is not a chore for you, it is the part of the job where you actually learn how the silicon behaves, and you are good at isolating root cause without needing someone to hold your hand through the process.

You are comfortable working in the space between what a specification says and what a design actually needs to do in the field, and you know how to ask the right questions when those two things do not line up. You do not need perfect documentation to get started, you work with what you have, collaborate with design and architecture teams to fill in the gaps, and build verification environments that catch issues before they become expensive problems downstream. At Synopsys, you will work on Silicon Lifecycle Management products that protect and monitor chips in some of the most demanding applications in the industry, and the verification work you do here will determine whether those chips actually hold up under real-world conditions.

What You'll Be Doing

    Design and execute verification test cases for Silicon Lifecycle Management IP blocks and subsystems

    Debug and diagnose test failures across digital, analog, and mixed-signal components

    Collaborate with design, architecture, and product teams to resolve technical issues, clarify specifications, and refine verification strategies

    Develop and maintain testbenches and verification environments using industry-standard EDA tools on Unix/Linux platforms

    Track and stay current with SLM product roadmaps, emerging verification methodologies, and industry trends in hardware security and lifecycle management

The Impact You Will Have

    Enable the world's leading semiconductor companies to ship chips that are secure, reliable, and production-ready

    Improve verification coverage and test quality for SLM products 

    Contribute to the development of next-generation hardware security and monitoring IP 

    Strengthen cross-functional collaboration between verification, design, and product teams, reducing time to market

    Build verification infrastructure and test cases that future engineers will rely on for years

What You'll Need

    Bachelor's or Master's degree in Computer Science, Electrical Engineering, or equivalent practical experience

    At least 2 years of hands-on experience in design verification, ideally in IP or ASIC environments

    Working knowledge of EDA verification tools such as simulators, waveform viewers, and coverage analyzers

    Proficiency working in Unix/Linux environments for development, scripting, and tool execution

    Strong debugging skills with the ability to isolate issues across complex digital and mixed-signal designs

    Solid written and verbal communication skills in English for documentation, collaboration, and technical discussions

    Experience with digital, analog, or mixed-signal IP design is a strong plus

Who You Are

    You can take a vague bug report, reproduce the failure, and walk a design engineer through exactly what is breaking and why without losing patience

    When a test case fails intermittently, you do not ignore it or mark it as flaky, you treat it as a real issue and track it down

    You are comfortable asking questions when a specification is unclear or incomplete, and you push back when a requirement does not make technical sense

    You stay organized across multiple verification tasks, keeping track of what is passing, what is failing, and what still needs coverage without dropping threads

    You are the kind of person who reads release notes, checks for tool updates, and experiments with new verification techniques because you want to get better at this

The Team You'll Be Part Of

You’ll join a talented and diverse engineering team focused on developing and verifying cutting-edge Silicon Lifecycle Management IPs for next-generation chip solutions. The team values open communication, innovation, and mutual support, working collaboratively to solve complex problems and deliver world-class products. You’ll have the opportunity to contribute to cross-functional projects, engage with global stakeholders, and shape the future of semiconductor design and verification. 

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

#TPG

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.