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General Information

Job Title
ASIC Digital Design, Engineer
Job ID
4590
Country
India
City
Bangalore
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
The candidate will be part of the R&D in Solutions Group at our Bangalore or Pune Design Center in India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in a role that will  include  IP Design using latest HDL and design Flows .

Job Responsibilities:
  • Will be working on the next generation USB/DDR/PCIe/Ethernet protocols for commercial, Enterprise and Automotive applications
  • Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create architecture and micro-architecture with detailed design documents for some of the components of the design for medium to high complexity functionality.
  • Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debug, Test development etc.
  • May need to interact with customers to discuss/ understand customers’ specification requirements, if needed .
  • The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide.

Must have BSEE in EE with 2+ years of relevant experience or MSEE with 1+ years of relevant experience in the following areas:
  • Knowledge of one or more of protocols: Ethernet,  DDR, PCIe, USB, MIPI-UFS/Unipro/ SD-MMC/ /USB/AMBA (AMBA2, AXI)
  • Hands on experience with architecting/ micro-architecture/ detailed design from Functional Specifications. Must have worked on control path oriented designs like asynchronous FIFO, DMA architectures, SPRAM/ DPRAM interface design, etc.
  • Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools
  • Lint, CDC, Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background
  • Experience with Perforce or similar revision control environment
  • Knowledge of Perl/Shell scripts.
  • Exposure to quality processes in the context of IP design and verification is an added advantage
  • Ability to work/ Prior experience as a Technical Lead for a small team is a major plus.

In addition, the candidate should have good communication skills, should be a team player and possess good problem solving skills.
 
 

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.