Synopsys

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent a decade building verification environments that have to catch the bugs no one else sees, the edge cases buried three layers deep in a protocol spec, the timing violations that only show up when you push a PHY to its actual operating limits. You know that emulation is not just faster simulation, it is a completely different way of thinking about verification, and you have learned how to make Zebu do things that most teams did not know were possible.

You are the person who reads a PCIe or DDR spec update and immediately knows which corner of your testbench just became obsolete. You do not wait for someone to tell you there is a gap between what the Emulation IP supports and what your Design IP actually needs, you find it, document it, and drive the fix before it becomes a schedule problem. You have shipped IP that worked in customer silicon because you treated pre-silicon validation like it mattered more than the tapeout party.

You are comfortable sitting with a controller team in Bangalore, a PHY team in the US, and an emulation platform team somewhere else entirely, and walking out with a plan everyone believes in. You know when to push back on a test plan that looks complete but is actually missing coverage, and you know how to explain why without making it personal.

At Synopsys, you will work on the IP that powers the highest performance chips in the world, and the verification work you do will determine whether those chips actually work.

What You'll Be Doing

• Close the gap between what Zebu Emulation IP provides out of the box and what your Design IP verification actually requires, spanning Controller and PHY domains for PCIe, DDR, and Ethernet interfaces
• Define technical requirements for Emulation IP feature sets, working directly with platform and IP teams to ensure correct implementation and deployment across verification flows
• Track and report emulation quality metrics, driving continuous improvement in IP performance, coverage completeness, and time to first pass
• Stay ahead of evolving standards for PCIe, DDR, and Ethernet, translating ECNs, errata, and spec updates into actionable changes for both Emulation and Design IP teams
• Review and validate test plans for Emulation IP and Design IP, ensuring traceability from requirements through coverage and guaranteeing best in class verification quality
• Mentor engineers across verification and emulation disciplines, building capability and standardizing methodologies across a globally distributed team
• Collaborate cross-functionally with design, product, and platform engineering teams to optimize workflows, resolve integration issues, and align on verification strategy

The Impact You Will Have

• Accelerate time to market for high performance silicon by building emulation strategies that catch critical issues months before tapeout
• Elevate product quality and customer satisfaction by ensuring IP ships with verified, traceable, and complete coverage across all protocol layers
• Drive adoption of best in class verification methodologies across Synopsys, influencing how teams approach emulation and pre-silicon validation
• Standardize verification workflows and requirements definitions, reducing rework and increasing efficiency across multiple product lines
• Shape the next generation of emulation and verification solutions, positioning Synopsys IP as the most reliable and thoroughly validated in the industry
• Build cross-functional alignment between geographically distributed teams, ensuring that verification strategy supports both product goals and customer needs
• Influence IP roadmaps by surfacing gaps, risks, and opportunities early, based on deep technical insight into emulation platform capabilities

What You'll Need

• * You have 10 to 15 years of hands-on experience in emulation, IP verification, or ASIC digital design
   * You bring deep expertise in PCIe and DDR protocols, including verification strategies, corner cases, and standards compliance
   * You possess extensive experience with Zebu or similar emulation platforms, particularly for IP-level verification and system-level integration
   * You have a proven track record leading or contributing to IP product development with a focus on emulation-based verification
   * You have a strong ability to work across global, matrixed teams and drive alignment between emulation IP and design IP organizations
   * You possess excellent communication skills—you can explain a complex tradeoff to a design lead in two sentences without losing the nuance
   * Experience interpreting and applying industry standards updates, ECNs, and errata in real verification contexts is a strong plus 

Who You Are

• You can look at a test plan and immediately spot what is missing, not just the obvious gaps but the subtle ones that only show up when you understand how the spec actually behaves under stress
• You do not wait for perfect information or perfect alignment, you work with what you have, ask the right questions, and move the work forward without creating confusion downstream
• You are the person other engineers come to when they hit a wall, not because you have all the answers but because you know how to find them and explain them clearly
• You push back when a verification strategy is too thin or a coverage model does not match the actual risk, and you do it in a way that builds trust instead of defensiveness
• You treat mentoring as part of the job, not an extra, and you have seen engineers grow because you took the time to explain not just what to do but why it matters
• You are comfortable with ambiguity and change, whether that is a late breaking spec update, a platform limitation that requires creative workarounds, or a shifting project priority

The Team You'll Be Part Of

You will join a dynamic, high performing engineering team focused on IP development, emulation, and verification at the forefront of semiconductor innovation. Our team is collaborative, cross-functional, and globally distributed, working together to solve complex challenges and deliver industry leading solutions. You will have the opportunity to collaborate with experts across multiple domains, drive impactful initiatives, and shape the future of digital design and verification at Synopsys.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process."