Synopsys

Senior Design Verification Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation."

You Are:

You are a seasoned verification engineer with a passion for technology and innovation. With a minimum of 3 years of industry experience, you possess a deep understanding of Verilog, System Verilog, and scripting skills in Perl/Python. You excel in developing test benches and have a strong proficiency in UVM verification environments. Your debugging skills are top-notch, enabling you to efficiently root cause issues. You have demonstrated good communication and problem-solving skills, and experience in DFI, DDR PHY, or Memory subsystems is a plus. You thrive in dynamic environments, working independently with architects and RTL designers while providing technical leadership on verification from initial specification to tape out.

What You’ll Be Doing:

• Developing test benches and verifying integrated IP Subsystems for global customers.
• Triaging issues by working independently with architects and RTL designers.
• Providing technical leadership on verification from initial specification to tape out.
• Collaborating closely with cross-functional teams to ensure seamless integration.
• Utilizing advanced debugging skills to identify and resolve complex verification issues.
• Continuously improving verification methodologies and processes to enhance efficiency.

The Impact You Will Have:

• Ensuring the delivery of high-quality, reliable silicon chips.
• Contributing to the development of cutting-edge technologies that drive innovation.
• Optimizing chips for power, cost, and performance, reducing project schedules significantly.
• Enhancing the overall efficiency and effectiveness of the verification process.
• Supporting the creation of technologies that power self-driving cars, AI, 5G, and the IoT.
• Playing a crucial role in maintaining Synopsys' position as a leader in the semiconductor industry.

What You’ll Need:

• BSEE in EE with 3+ years of industry experience or MSEE with 2 years.
• Proficiency in Verilog, System Verilog, and Perl/Python scripting skills.
• Strong experience with UVM verification environments.
• Exceptional debugging skills with the ability to root cause issues effectively.
• Experience in DFI, DDR PHY, or Memory subsystems is a plus.

Who You Are:

• A collaborative team player with excellent communication skills.
• A proactive problem-solver who can work independently and take initiative.
• A detail-oriented professional with a strong analytical mindset.
• A continuous learner who stays updated with the latest industry trends and technologies.

The Team You’ll Be A Part Of:

You will be joining our DDR PHY IP team, a group of talented professionals dedicated to developing and verifying high-performance IP subsystems. This team is focused on delivering innovative solutions that meet the needs of our global customers, fostering a collaborative and dynamic work environment.

Rewards and Benefits:

"We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process."

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.