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General Information

Job Title
ASIC Digital Design, Sr Engineer
Job ID
16637
Country
India
City
Hyderabad
Date Posted
26-Mar-2026
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

Alternate Job Titles:

  • ASIC Verification Engineer


We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced ASIC Digital Design Engineer with a passion for functional verification and a drive to deliver high-quality silicon solutions. You thrive in a collaborative environment, bringing a mix of technical expertise and creative problem-solving to every project. You have a strong grasp of industry protocols such as PCIe, CXL, UCIe, Ethernet, DDR, or USB, and are adept at leveraging UVM and SystemVerilog to develop robust verification environments. You are meticulous in your approach, able to dissect complex simulation failures and proactively resolve issues. Your communication skills are exceptional, allowing you to share technical findings and progress with clarity across teams and stakeholders. You enjoy working on advanced protocol-based verification, contributing to methodology improvements, and have a continuous learning mindset. You understand the importance of functional coverage, regression management, and are comfortable navigating the challenges of subsystem or SoC-level verification. Your collaborative nature and analytical thinking make you a valuable asset in cross-functional teams, where your input drives both technical excellence and innovative solutions. If you are energized by solving challenging problems, eager to contribute to cutting-edge technology, and committed to your professional development, Synopsys is the place for you.

What You’ll Be Doing:

  • Developing and executing comprehensive verification plans for subsystem features and interfaces.
  • Building, enhancing, and maintaining UVM-based verification environments for complex RTL designs.
  • Creating reusable and scalable testbenches, sequences, checkers, and scoreboards to ensure thorough coverage.
  • Debugging simulation failures, analyzing waveform-level issues, and driving root-cause analysis to resolution.
  • Collaborating closely with design, architecture, and cross-functional engineering teams to align on specifications and compliance.
  • Defining and implementing test scenarios, including directed, constrained-random, and corner-case verification.
  • Supporting regression planning, test execution, and coverage closure activities to ensure quality silicon delivery.
  • Contributing to methodology improvements and best practices in functional verification.
  • Communicating progress, technical findings, and risks effectively with stakeholders and team members.


The Impact You Will Have:

  • Enhancing the robustness and performance of subsystem and SoC-level designs through rigorous verification processes.
  • Driving the delivery of high-quality silicon solutions that power next-generation technologies.
  • Accelerating time-to-market for Synopsys’ clients by ensuring reliable and efficient verification workflows.
  • Improving verification methodologies and contributing to best practices that set industry standards.
  • Fostering collaboration across design, architecture, and engineering teams to achieve common goals.
  • Identifying and resolving technical risks early, ensuring successful project outcomes and client satisfaction.


What You’ll Need:

  • Bachelor’s or Master’s degree in electronics, electrical engineering, or a related field.
  • Minimum 3+ years of hands-on verification experience, preferably in subsystem or SoC-level projects.
  • Strong proficiency in protocols such as PCIe, CXL, UCIe, Ethernet, DDR, or USB.
  • Solid experience with SystemVerilog/UVM and assertion-based verification techniques.
  • Expertise in functional coverage, code coverage, and regression management.
  • Strong debugging skills using simulation and waveform analysis tools.
  • Exposure to formal verification techniques and their application in real-world scenarios.


Who You Are:

  • Analytical thinker with a passion for problem-solving and innovation.
  • Effective communicator, able to convey complex technical concepts to diverse audiences.
  • Collaborative team player who thrives in cross-functional environments.
  • Proactive, detail-oriented, and committed to delivering high-quality results.
  • Adaptable and eager to learn new methodologies and technologies.


The Team You’ll Be A Part Of:

You’ll join a dynamic and diverse engineering team focused on subsystem and SoC-level verification. The team is committed to technical excellence, innovation, and continuous improvement, working collaboratively to deliver industry-leading solutions for Synopsys’ global clients. You’ll have the opportunity to share knowledge, mentor peers, and contribute to the development of advanced verification methodologies.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.