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General Information

Job Title
ASIC Digital Design, Sr Engineer
Job ID
4790
Country
India
City
Hyderabad
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
Knowledge of Verilog/System Verilog or any of the VMM/UVM/OVM methodologies is a plus
- Understanding  of semiconductor technology is plus .
- Familiar with VCS/Verdi  simulation tools, Formal verification tool (vc_formal)
- Scripts skills such as Perl, Python preferred
- Domain knowledge of protocols pcie/usb/ethernet/unipro is a significant advantage
- Self-motivated, hardworking and innovative in bringing solutions to complex problems.
  
The selected candidate will be working on top level Digital verification for high speed serdes with data range 8G->56G

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.