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General Information

Job Title
ASIC Digital Design, Sr Staff Engineer
Job ID
4720
Country
India
City
Hyderabad
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. 
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.
 
 ASIC Digital Design, Staff Engineer
The candidate will be a key member of the Synopsys ARC Processor hardware team working on next-generation ARC processor design and architecture. 
Individual contributor will be responsible for architectural and RTL design of microprocessor IP, Optimize design for performance, speed, area and power. Work with multi-site core teams. Review and improve verification test suites.
At minimum, a Bachelor’s degree in engineering is required with 12+ years of digital design experience using Verilog. Strong background in RISC architectures required. Working experience in RISC microprocessor IP design, programming at assembly and C/C++ level, DSP skills, an understanding of multi-core architectures and development techniques are a plus. Experience with multi-site development is helpful.
The successful candidate is expected to:
  • Design embedded RISC microprocessor IP at architectural and RTL level
  • Write High-level architecture and micro-architecture specifications of the design
  • Optimize design for performance, speed, area and power, generate hardware benchmarks and analyze results
  • Develop standalone Verilog testbenches to verify their module
  • Debug design issues / bugs working closely with the verification team
  • Maintain our current processor product line and their derivative products
  • Develop and maintain project plans. Work closely with program managers
  • Good written, oral and problem-solving skills desired along with good communication skills and inter-person skills
  • Work with multi-site, multi-time zone, multi-cultural teams on various aspects of the product like design, implementation, physical design, verification
 

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.