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General Information

Job Title
ASIC Digital Design, Sr Engineer
Job ID
4519
Country
India
City
Hyderabad
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
Job Responsibilities:
-- Working on architecture, RTL Design of SerDes targeted for high speed protocols.
-- Verilog RTL coding.
-- Spyglass (CDC, RDC), Lint. Lint, CDC, Synthesis flow, Formal checking, etc is a must.
-- Debugging issues/failures & working on customizations.
-- Hands on experience in SerDes design & high speed protocols like, PCIe, Ethernet..

Weightage:
-- Experience with Perforce or similar revision control environment
-- Knowledge of Perl/Shell scripts.
-- Verification skills & languages.
-- Good communication, Team player.
-- Interaction with customers.

Further opportunities:
-- FW development, FPGA prototyping/validation.

Educational background:
-- BE/B.Tech/M.Tech OR equivalent with minimum 4-5 years industry experience.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.