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General Information

Job Title
ASIC Digital Design, Sr Staff Engineer
Job ID
5153
Country
China
City
Wuhan
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
We are looking for a senior design engineer to join us to develop the leading-edge interface digital IP.

Responsibilities:
  • Understand customer requirements, understand protocols, and write mirco-architecture specification and RTL on this basis.
  • Run Spyglass/VcSpyglass to check CDC/RDC/LINT and clean up issues.
  • Write assertions and do formal verification.
  • Run synthesis/STA/DFT. Analyze coverage data and provide solutions.
  • Support Verification and FPGA validation. 
Key qualifications:
  • Bachelor’s and/or master’s degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science.
  • Minimum 8 years of IP and/or ASIC Design experience is required.
  • Knowledge in USB, Ethernet, PCI Express, UFS or DDR protocols.
  • Good verbal and written communication skills in English.
  • High degree of self-motivation and personal responsibility.
Preferred Experience:
  • Independently work for IP/ASIC design.
  • ASIC/SoC tape-out from concept to full production.
  • Scripting languages (Shell, TCL, Perl, Python etc.)
  • Silicon debug and FPGA/hardware troubleshooting skills

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.