Synopsys

Job Description:
Experience - 8-15 Years
Job Location - Synopsys Bangalore
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As a formal verification engineer working on Synopsys Interface IP’s you will be responsible for:
-  Developing comprehensive formal verification test plan
-  Proving properties of the design, finding design bugs, and working closely with design teams to help improve IP quality
-  Crafting novel and creative solutions for verifying complex design micro-architectures
-  Developing and implementing re-usable and optimized formal models and verification code base
-  Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.
- Formal Method or Formal Verification technologies experience and abstraction techniques
- Knowledge and experience in interpreting hardware specifications and using temporal logic assertion-based languages such as SVA
- Experience in using EDA formal tools and tool development experience
- Strong proficiency in any scripting language with excellent debugging skills
- Extraordinary teammate with excellent interpersonal skills
- Passionate about developing world-class/innovative formal verification solutions
 

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.