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General Information

Job Title
ASIC Digital Design, Staff Engineer
Job ID
4818
Country
India
City
Hyderabad
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance-eliminating months off their project schedules.

ASIC Digital Design, Staff Engineer

The candidate will be a key member of the Synopsys ARC Processor hardware team working on next-generation ARC processor Verification.

Individual contributor will be responsible for Verification of RTL design of Processor IP. Work with multi-site design teams. Implement the testcases and review to improve verification test suites.

At minimum, a Bachelor’s/Master’s degree in engineering is required with 5+ years of digital design verification experience using UVM and System Verilog. Strong background in RISC architectures, AMBA (AHB, AXI) protocols are required. Working experience in RISC microprocessor IP design, an understanding of multi-core architectures and development techniques are a plus. Experience with multi-site development is helpful.

Required Skill set:

  • Verification of embedded RISC Processor IP
  • Write Verification plans based on High-level architecture and micro-architecture specifications of the design
  • Develop standalone System Verilog testbenches to verify at Module Level (MLV)
  • Working closely with the design/verification teams
  • Hands on experience closing the Functional and code coverages
  • Maintain our current processor product line and their derivative products
  • Good written, oral and problem-solving skills desired along with good communication skills and inter-person skills
  • Work with multi-site, multi-time zone, multi-cultural teams on various aspects of the product like design, implementation, physical design, verification

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.