Synopsys

Staff Engineer – ASIC Physical Design

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an accomplished engineer with a passion for innovation in the semiconductor industry. Your expertise in ASIC physical design is matched by your curiosity to explore and master new technologies. You thrive in collaborative environments, communicating effectively both within your team and across departments. When faced with ambiguity or high-pressure situations, you remain composed, methodical, and solution-focused. You have a keen eye for detail, a drive for continuous learning, and a proactive approach to problem-solving.

Your background includes significant hands-on experience with leading-edge CAD tools such as ICC2/FC and ICV, and a deep understanding of FinFET process technologies. You are comfortable navigating the complexities of RTL-to-GDSII flows, and you bring a solid foundation in electronics or VLSI engineering. Whether brainstorming with colleagues or representing your organization in cross-functional projects, you demonstrate professionalism, leadership, and a commitment to excellence. Your ability to network with senior personnel—internally and externally—enables you to stay at the forefront of industry trends and best practices. Above all, you are motivated by the opportunity to shape next-generation silicon solutions that will power tomorrow’s innovations.

What You’ll Be Doing:

• Implementing DDR and HBM PHYs for customer ASICs and SoCs, leveraging industry-leading CAD tools and methodologies.
• Driving the end-to-end physical design process, including synthesis, floor planning, place & route (PNR), physical verification (PV), static timing analysis (STA), design-for-test (DFT), and ATPG.
• Collaborating closely with cross-functional engineering teams to ensure design quality, performance, and manufacturability
• Identifying and resolving design challenges, proactively mitigating risks, and optimizing for power, performance, and area (PPA).
• Providing technical guidance and mentorship to junior team members, fostering a culture of learning and innovation.
• Representing the team on business unit and company-wide projects, networking with senior stakeholders and contributing to strategic initiatives  
• Documenting design flows, best practices, and lessons learned to drive continuous improvement.

The Impact You Will Have:

• Enabling Synopsys customers to accelerate time-to-market for cutting-edge ASIC and SoC products.
• Driving technological innovation in high-speed PHY implementations, supporting complex memory interfaces.
• Enhancing the quality and reliability of silicon designs through rigorous physical verification and test methodologies.
• Optimizing silicon performance and power consumption, directly contributing to customers’ competitive advantages.
• Elevating team expertise and efficiency by sharing knowledge, setting standards, and mentoring peers.
• Contributing to Synopsys’ leadership in the semiconductor industry by delivering high-impact solutions and representing the company in key projects.

What You’ll Need:

• Minimum 5+ years of hands-on experience in ASIC physical design, with a strong track record in implementing complex IPs such as DDR/ HBM PHYs.
• Expertise with state-of-the-art CAD tools (ICC2/FC, ICV) and familiarity with FinFET process technologies.
• Solid understanding of the RTL-to-GDSII flow, including synthesis, floorplan, PNR, PV, STA, DFT, and ATPG.
• Bachelor’s or Master’s degree in Electronics, VLSI, or related engineering discipline  
• Demonstrated ability to troubleshoot and resolve design issues, optimize PPA, and ensure successful tape-outs.

Who You Are:

• Excellent communicator—clear and concise in both verbal and written interactions.
• Collaborative team player, open to sharing knowledge and supporting colleagues.
• Adaptable, with a strong desire to learn and embrace new tools and technologies.
• Calm under pressure, able to manage uncertainty and make informed decisions during critical project phases.
• Proactive problem-solver, with strong analytical and organizational skills.
• Professional, ethical, and able to represent the organization with confidence and integrity.

The Team You’ll Be A Part Of:

You’ll join a talented and dynamic engineering team at Synopsys Hyderabad, dedicated to delivering world-class physical design solutions for customer ASICs and SoCs. The team covers the full spectrum of RTL-to-GDSII activities and works closely with customers, internal experts, and cross-functional partners. Together, you’ll tackle complex design challenges, drive innovation, and contribute to the success of next-generation semiconductor products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.