Synopsys

Position: Analog Mixed Signal Design Engineer

Location: Etown 5 building, Tan Binh Ward, Ho Chi Minh city

We Are: 

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

What You'll Be Doing: 

• Design circuit for Analog IPs like High Speed IOs, LCDL, Bandgap, High Speed macros for high speed PHY, Clock trees, Calibration circuits...
• Analyze and verify to make sure design meet all requirements of functionality, performance, area and reliability.
• Work closely with layout engineers to make sure layout quality. Perform post layout verifications.
• Perform design characterizations, functionality checks, EMIR analysis, Co-simulations for Logic-Analog full chip operations. 
• Design analysis  and solve problems of noise, margin, signal integrity, power integrity. 
• Complete all design quality checks and data quality checks
• Do design reviews across global team 
• Work with digital/system engineer to integrate analog designs into mixed signal system. Perform mixed signal verification which combining both analog and digital blocks.

Authority:

• Normally receives detailed instructions on all work.
• Follows standard practices and procedures in analyzing situations or data from which answers can be readily obtained.
• Applies company policies and procedures to resolve routine issues.

What You'll Need: 

• Bachelor's or Master's degree in Electronics - Electrical Engineering, or Telecommunications; Computer Science Engineering or related ones.
• 0-2 year working experience in similar roles or fresh graduates (Fresh graduates are also welcomed and offered the on-the-job training to adapt the position's requirements.)
• Having internship or research experience in relevant field is preferrable 
• Knowledge of CMOS Analog design knowledge and techniques
• Familiar with circuit design tools: SNSP Custom Designer, Cadence Virtuoso and circuit simulation tools: Hspice or Spectre or Custom Sim…
• Good understanding of layout effects on circuit performance. 
• Familiar with writing design review presentations and circuit verification reports
• Strong problem-solving abilities and keen attention to detail.
• Good verbal and written English communication skills.
• Highly responsible and self-motivated, with a strong sense of ownership over your work.
• Collaborative team player, open to feedback and eager to learn from others.
• Detail-oriented and methodical, always striving for accuracy and quality.
• Effective communicator, able to articulate technical concepts clearly.
• Adaptable and resilient in the face of new challenges or shifting priorities.
• Enthusiastic about contributing to a diverse, inclusive, and innovative workplace.

The Team You’ll Be A Part Of:

You’ll join the Synopsys UCIe Design Team, a dynamic group of engineers specializing in advanced chiplet interconnect and analog mixed-signal technologies. This is global team, which is working on state-of-the-art UCIe, 2.5D/3D IC, and Tbps die-to-die interfaces. 

As a team member, you’ll receive structured training, mentorship, and exposure to the complete design flow, helping you grow into a technical expert or future design leader. If you are passionate about precision timing analysis and eager to work in a collaborative, innovative environment, we’d love to have you on our team. 

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.