Descriptions & Requirements
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent years designing analog circuits that have to perform under real conditions, not just pass simulation. You know that a SerDes PHY is only as good as its weakest block, and you are the kind of engineer who catches the jitter problem in the PLL before it becomes a customer escalation. You think in tradeoffs, power versus speed, area versus performance, and you can articulate why you made the call you did.
You do not need a perfect spec to get started. You work with what exists, ask the right questions, and move forward. Mentoring comes naturally because you would rather spend 20 minutes explaining a concept well than fixing someone else's mistake later. Documentation is not a chore, it is how you ensure the next person does not have to reverse-engineer your thinking. At Synopsys, you will work on SerDes IP that ships to customers building cutting-edge systems.
What You'll Be Doing
- Design and verify analog circuits for SerDes PHY IP blocks using cutting-edge process nodes, including PLLs, equalizers, drivers, and receivers
- Own engineering project functions from architecture through tape-out, ensuring performance, power, and area targets are met
- Drive internal and customer-facing design reviews, presenting technical tradeoffs clearly to engineering teams and external stakeholders
- Prepare technical specifications and customer documentation that translate complex circuit behavior into usable deliverables
- Mentor junior analog engineers, reviewing their schematics, simulation setups, and design approaches
- Estimate project timelines and resource needs, and manage project execution when needed to keep deliverables on track
The Impact You Will Have
- Your analog circuits will power SerDes IP in AI, data center, and automotive systems worldwide
- The specifications you create will become the foundation for customer implementations and future design iterations
- Your mentorship will directly accelerate junior engineers' ability to contribute to complex projects
- The design reviews you lead will catch issues early, reducing costly respins and ensuring IP quality
- Your technical decisions will influence product performance and competitiveness for years
- Your collaboration across global teams will ensure designs integrate cleanly without escalation
What You'll Need
- Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or equivalent technical discipline
- 5+ years of hands-on experience designing analog circuits with strong understanding of circuit operation and design principles
- Proficiency with analog IC design tools including Hspice, Primesim, Finesim, xa, Custom Compiler, and Waive View
- Ability to estimate project timelines and resources, and manage engineering work with minimal supervision
- Excellent written and verbal communication skills in English
- Experience with SerDes PHY design is a strong plus
- Familiarity with TCL, scripting languages, or AI-assisted design flows is a plus
Who You Are
- You can explain not just what your circuit does, but why you designed it that way and what tradeoffs you considered
- When a junior engineer asks for help, you walk them through the thought process so they can solve the next problem themselves
- You are comfortable working across time zones and keeping communication clear when you cannot just walk over to someone's desk
- You figure out what needs to happen next without waiting for someone to tell you
- You provide crisp status updates to management without over-explaining or underselling what is actually happening
The Team You'll Be Part Of
You will join the Yerevan-based analog design team working on SerDes IP development for customers across multiple industries. The team collaborates closely with on-site and international engineering groups, and your work will directly contribute to IP deliverables that ship to external customers. Your recruiter will share more about the team structure and current project focus during the interview process.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.