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General Information

Job Title
Analog Design, Staff Engineer
Job ID
17651
Country
Armenia
City
Yerevan
Date Posted
27-May-2026
Job Category
Engineering
Job Subcategory
Analog Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You bring years of experience in analog circuit design where precision at the millivolt and femtofarad level determines product success. You understand the engineering trade-offs inherent in high-speed analog design. Every decision you make regarding equalizer configuration, CDR loop bandwidth, or transmit driver specifications reflects a careful balance of power consumption, silicon area, and performance requirements.

Your expertise with SPICE-based simulation enables you to identify design vulnerabilities through rigorous corner analysis and Monte Carlo verification before they reach fabrication. You have developed strong working relationships with layout engineering teams because you recognize that parasitic management must be considered from initial architecture through physical implementation.

Your technical communication skills allow you to present complex circuit behavior and design rationale clearly to both engineering colleagues and customers. You approach documentation as a critical engineering deliverable that ensures design intent is preserved throughout the product lifecycle and enables successful IP integration.

What You'll Be Doing

  • Design and optimize analog sub-blocks for high-speed SerDes IP, including equalizers, Clock Data Recovery circuits, and transmit drivers
  • Conduct transistor-level SPICE simulations with comprehensive corner analysis and Monte Carlo verification across process, voltage, and temperature variations
  • Collaborate with layout engineering teams to minimize parasitic effects and maintain signal integrity throughout physical implementation
  • Present simulation results, design trade-offs, and performance analysis to internal engineering teams and external customers
  • Create detailed documentation of circuit functionality, verification coverage, and integration requirements to support IP delivery
  • Develop comprehensive test plans that translate circuit-level specifications into measurable verification objectives for post-silicon validation

The Impact You Will Have

  • Your circuit designs will enable multi-gigabit data communication capabilities in AI, automotive, and data center applications
  • Thorough corner and Monte Carlo analysis will reduce the likelihood of post-silicon design iterations and accelerate customer product development schedules
  • Effective collaboration with layout teams will result in more efficient tape-out cycles with reduced parasitic-related design issues
  • Comprehensive documentation will enable verification teams to identify potential issues earlier in the development process
  • Well-structured test plans will provide customers with greater confidence in IP functionality and integration success
  • Your engineering decisions regarding power, area, and performance optimization will influence the competitive positioning of the IP portfolio

What You'll Need

  • Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related technical field
  • Minimum 5 years of professional experience in analog circuit design with focus on high-speed data communication systems
  • Strong technical knowledge of analog sub-block specifications for equalizers, Clock Data Recovery circuits, and transmit drivers
  • Demonstrated proficiency with transistor-level SPICE simulation methodologies, including corner analysis and Monte Carlo verification techniques
  • Proven experience collaborating with layout engineering teams to manage parasitic effects and preserve signal integrity
  • Strong technical documentation skills with ability to clearly communicate circuit functionality, verification approaches, and integration requirements

Who You Are

  • You can articulate complex technical trade-offs and design rationale clearly to both technical and customer audiences
  • You incorporate layout parasitic considerations into your initial design approach rather than addressing them reactively
  • You structure technical presentations to address stakeholder priorities while maintaining engineering rigor
  • You view corner and Monte Carlo analysis as fundamental design validation activities rather than procedural requirements
  • You provide constructive feedback when specifications lack clarity or verification strategies do not adequately address known failure modes

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.