Synopsys

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and motivated Analog Design Engineer with a passion for developing cutting-edge technologies. You thrive in a collaborative environment and have a deep understanding of analog design fundamentals and device physics. Your experience with high-speed IO designs and advanced technologies positions you as a key contributor to our innovative projects. You possess excellent analytical and problem-solving skills, and your ability to execute circuit design tasks with precision and efficiency is unmatched. Your familiarity with ESD, reliability concepts, and JEDEC requirements for memory interfaces further enhances your expertise. You are an effective communicator with strong interpersonal skills, enabling you to work seamlessly with cross-functional teams across the globe.

What You’ll Be Doing:

• Developing next-generation high-speed memory interface PHY IPs (DDR/HBM/UCIe)
• Executing projects in advanced technologies with a focus on analytical and problem-solving skills
• Designing high-speed IOs for memory interface PHY IP in CMOS/FinFET/GAA
• Collaborating with cross-functional teams globally to achieve project goals
• Ensuring product quality and efficiency in all design tasks
• Staying updated with the latest industry standards and technological advancements

The Impact You Will Have:

• Driving the development of innovative high-speed memory interface PHY IPs
• Contributing to the integration of advanced capabilities in SoCs
• Enhancing the performance, power efficiency, and size optimization of target applications
• Reducing risk and accelerating time-to-market for differentiated products
• Collaborating with global teams to deliver high-quality products
• Setting industry benchmarks for advanced analog design technologies

What You’ll Need:

• BTech/MTech degree in a relevant field
• 3+ years of experience in analog design fundamentals and device physics
• Proficiency in high-speed IO designs in advanced technologies
• Experience with ESD and reliability concepts
• Knowledge of JEDEC requirements for memory interfaces and standards
• Familiarity with signal integrity and/or power integrity is a plus

Who You Are:

• An analytical thinker with strong problem-solving skills
• A collaborative team player with excellent communication and interpersonal skills
• Detail-oriented and capable of executing tasks with high precision and efficiency
• Adaptable and eager to learn new technologies and industry standards
• Passionate about innovation and technological advancements

The Team You’ll Be A Part Of:

You will be part of a dynamic team of highly competent technical experts focused on developing next-generation memory interface PHY IPs. Our team thrives on collaboration, innovation, and the pursuit of excellence. Together, we drive the integration of advanced capabilities into SoCs, enabling our customers to meet unique performance, power, and size requirements quickly and with reduced risk.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.