Synopsys

We are working on designing SerDes PHYs using cutting edge technologies for the Customers. Works on complex problems where analysis of situation or data requires an in-depth evaluation of various factors.

Main Responsibilities:

• Responsible for subblock and top-level simulations
• Responsible for schematic corrections, updated, additions if needed
• Ability to accurately estimate time and resources required for a project
• Ability to prepare technical specification/documentation for the project
• Drive design reviews (internally and externally with customer) when/if necessary
• Work with different teams (on site and oversees) to achieve goals
• Work with less to no supervision
• Periodically status updates provision to management

Key Requirement: 

• MS/PHD in electrical engineering, computer science or equivalent to them
• 5+ Years of experience in Analog Circuits design
• Work experience on PLLs is advantage
• Excellent understanding of Analog design principles and circuits operation
• Knowledge of 
  • IC design tools such as Hspice, finesim, primesim, xa, Custom Compiler, Waive View
  • Microsoft Office (Excel, Word, Power point)
  • Knowledge of TCL, Python scripting languages is advantage.
• Excellent communication skills (written and verbal English)

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.