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General Information

Job Title
Applications Engineering, Principal Engineer
Job ID
5593
Country
India
City
Hyderabad
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
Applications Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
The candidate will be a member of the GTM CSG which offers the industry leading RTL verification platform. VCS provides advanced, built-in technologies, including full-featured testbench, complete assertion support, a library of assertion checkers and comprehensive coverage and analysis, to enable smart verification of complex system-on-chip designs.
 
Application Engineer (AE) position gives you the opportunity to be a part of a fantastic team working on Synopsys Verification Platform, primarily on VCS simulator used by every major hardware company in the world. The responsibilities involve providing pre/post-sales technical support, analysis of customers current verification methodology, presentation  and deployment of verification methodologies, driving verification benchmarks, developing and delivering technical trainings, managing alpha and beta customer rollout.  As an AE, you will be responsible to interact with and support key customers, help them analyze and resolve complex verification issues for their cutting edge ASIC designs, and learn to mold their technical requirements into a mutually rewarding growth opportunity.  Leveraging your close interaction with customers, R&D, Marketing, and Sales teams you will be able to influence development of next generation verification tools by defining the future direction and scope of enhancements, flows, and methodologies.
 
A successful candidate will be expected to have expertise in ASIC design/verification methodologies and technologies, passion to work with customers in achieving their verification goals, resolve issues in creative ways, exercise independent judgment in selecting methods and techniques to obtain solutions, ability to execute projects from start to completion, determine and develop recommendations to solutions and work on team-driven or task-oriented projects. May guide more junior peers with aspects of their job. Networks with senior internal and external personnel in own area of expertise.
 
Desired Skills & Experience 
•            Knowledge of VLSI design flow and methodology, Expertise in HDL/HVL including  SystemVerilog, Verilog, VHDL, SystemC
•            Experience in front-end verification including RTL/TB coding, simulation debug
•            Proficient in UNIX usage, Perl scripting
•            Strong communication skills, both verbal and written. Ability to lead and coordinate discussions in a small group as well as present them in an organized fashion to larger groups
•            Working experience on UVM/VMM/OVM Methodologies
•            Knowledge of Low Power Design/Verification, Debug using Verdi, Fault simulation, Verification Planner would be a plus
 
Overall relevant experience of 9-12yrs with Masters degree is desirable.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.