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General Information

Job Title
Sr. Applications Engineer
Job ID
6491
City
Sunnyvale
State/Province
California
Date Posted
20-Sep-2024
Job Category
Engineering
Job Subcategory
Applications Engineering
Hire Type
Employee
Remote Eligible
No
Base Salary Range: $183000 - $275000

Descriptions & Requirements

Job Description and Requirements

Emulation has become indispensable part of SoC designs verification with growing design size and complexity. Synopsys is uniquely positioned to offer the most complete verification, emulation, and prototyping solution in the market today. This Applications Engineer position offers a unique opportunity to work in both simulation and emulation. The job responsibilities involve exploration of customer’s current verification methodology, defining and developing solutions that fit in between simulation and emulation. In addition to end-to-end ownership of key accounts/initiatives, the position requires strong focus on product development and close collaboration with R&D teams.
 
In a customer facing role, the Applications Engineer drives product demonstrations, evaluations, feature deployments and competitive platform benchmarking. You own key on-going engagement and serve as single key contact for all technical challenges seen on specific account/project. In a product facing role, Applications Engineer drives product development with R&D based on their insight into the customers' needs and Issues. You would be responsible for defining requirement specs, ramping up product validation team, product development and customer delivery tracking, internal technical evaluations, trainings etc. Leveraging your close interaction with customers, R&D, Marketing, and Sales teams, you will be able to demonstrate the differentiated emulation/verification environment influencing customer action for Synopsys ZeBu HW adoption.
 
Requirements:

  • Minimum 10+ years of experience in ASIC/FPGA design or verification methodology with a good understanding of SystemVerilog/Verilog/VHDL. 
  • Direct experience in SoC design verification/validation using either simulation or emulation or both. 
  • Good understanding of RTL, testbench, synthesis, mapping RTL to Xilinx FPGA based platform, Unix/Linux development environment.
  • Good understanding of synthesis and timing analysis concepts
  • Knowledge of C/C++ and scripting languages like Tcl, Python is a plus
  • Excellent customer interface, negotiation, communication and planning skills. Motivated to help customers achieve their verification/validation goals.
  • Sound trouble shooting and problem-solving skills. Ability to lead high complexity technical tasks spread across multiple teams.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.