Synopsys

As a Senior Applications Engineer, you will contribute to making Synopsys Synplify FPGA synthesis tools a technical and commercial success by helping create specifications and validate the tool from customer’s perspective. In this role, you will be assuming complete responsibility of supporting the customer on all technical queries, analyze and propose recommendations for improving the QoR of Synplify tool. Leverage your expertise by writing Application notes and SolvNetPlus articles to help customer understand the features and flow.

Job Requirement:

1. BE or ME with 2+ years of experience in logic design and implementation using FPGAs.
2. Strong knowledge on Verification concepts and writing test benches.
3. Should have very good hands-on experience in Verilog and/or VHDL. 
4. Strong in problem solving skills.
5. Should have good experience in Synthesis, back-end flow, FPGA architecture and implementing designs in hardware. 
6. Excellent communication and inter-personal skills, professional attitude and strong desire to succeed.
7. Exposure to Xilinx/Altera synthesis software is a plus.
8. Scripting knowledge is desirable.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.