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General Information

Job Title
Senior Manager, Design Verification Applications Engineering
Job ID
17410
Country
Taiwan
City
Hsinchu
Date Posted
07-May-2026
Job Category
Engineering
Job Subcategory
Applications Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

Alternate Job Titles

  • Senior Manager, Verification Applications Engineering
  • Sr Manager, Design Verification Solutions
  • Applications Engineering Manager, Functional Verification
  • Senior Manager, Field Applications Engineering, DV
  • Manager, Technical Applications Engineering, Verification


We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.


You Are

You have spent years deep in verification, building and debugging SystemVerilog and UVM testbenches that actually close coverage on complex SoCs, and now you lead teams that do the same. The difference between a testbench that finds bugs and one that just runs is something you see immediately, and you have learned how to coach others to see it too. You think in constraints, assertions, and coverage bins, but you also think in team capacity, customer priorities, and how to unblock three engineers working on different accounts in different time zones.

Managing technical people does not intimidate you. You know how to hire engineers who can hold their own in a customer debug session, and you know how to grow them into technical leaders who can run an engagement without you in the room. You care about outcomes, not just activity. When a customer is stuck two weeks before tape-out, you can decide whether to send someone, go yourself, or escalate, and you make that call fast.

Working across cultures and geographies is second nature to you. At Synopsys, you will lead a team that enables semiconductor companies to tape out on time using VCS, Verdi, VC Formal, and the full verification toolchain, and what your team delivers will directly affect whether those chips make it to market.


What You'll Be Doing

  • Lead and manage a team of applications engineers supporting Synopsys design verification solutions including VCS, Verdi, and VC Formal across customer accounts in Taiwan and Asia
  • Drive customer adoption of functional verification methodologies, working directly with engineering teams at semiconductor companies on live SoC projects that need to tape out
  • Build team capability through hiring, mentoring, and technical coaching, developing engineers who can independently lead customer engagements and solve complex verification challenges
  • Own customer escalations and critical technical issues, deciding when to deploy resources, when to engage R&D, and when to step in yourself to unblock a stuck project
  • Collaborate with sales, R&D, and global field teams to align on account strategy, product roadmaps, and customer feedback that shapes the next release
  • Deliver and oversee technical workshops, training sessions, and onsite engagements that get customer teams up to speed on constrained random verification, coverage closure, and advanced UVM techniques
  • Manage team workload, priorities, and coverage across multiple customer accounts, ensuring timely response to technical requests and alignment with business objectives


The Impact You Will Have

  • Enable your team to accelerate customer verification cycles, directly reducing time from RTL freeze to tape-out across multiple high-stakes SoC projects
  • Build a high-performing applications engineering team that becomes the trusted technical partner for leading semiconductor companies in the region
  • Improve customer satisfaction and retention by ensuring technical issues are resolved quickly and verification methodologies are adopted successfully
  • Influence Synopsys product direction by synthesizing customer feedback and real-world use cases from your team's engagements and feeding them back to R&D
  • Grow the next generation of technical leaders within Synopsys, coaching engineers to take on bigger accounts, harder problems, and eventually leadership roles themselves
  • Strengthen Synopsys market position in design verification by turning successful customer outcomes into long-term partnerships and advocacy
  • Shape how semiconductor companies across Asia adopt and succeed with advanced verification flows, contributing to the success of chips that power AI, mobile, automotive, and compute products


What You'll Need

  • Bachelor's or Master's degree in Electrical Engineering, Computer Science, or equivalent hands-on experience in verification engineering
  • 8+ years of experience in design verification with deep expertise in SystemVerilog, UVM, constrained random verification, and coverage-driven methodologies
  • Proven experience building, debugging, and optimizing testbenches and verification environments on real production SoC projects
  • 3+ years of people management or technical leadership experience, including hiring, mentoring, and performance management of engineering teams
  • Strong technical knowledge of Synopsys verification tools such as VCS, Verdi, and VC Formal, with hands-on experience deploying them in customer environments
  • Demonstrated ability to manage customer escalations, prioritize team resources, and make decisions under pressure when projects are at risk
  • Excellent communication skills in English, both written and spoken, with the ability to present technical content to customer executives and internal stakeholders
  • Willingness to travel locally within Taiwan and regionally across Asia to support customer engagements and team development


Who You Are

  • You can walk into a customer escalation meeting, assess the technical issue and the team dynamic in the room, and leave with a clear plan that everyone believes in
  • You know how to coach an engineer through a tough customer interaction without taking over, and you know when to step in and handle it yourself
  • You stay organized across multiple customer accounts, team priorities, and open technical issues without losing track of what needs to close this week
  • You are comfortable presenting to a room full of senior engineers or customer executives and adjusting your message based on what the room needs to hear
  • You build trust quickly, with your team and with customers, because you follow through and you do not overpromise
  • You think about team growth as seriously as you think about customer outcomes, and you actively create opportunities for your engineers to stretch and lead


The Team You'll Be Part Of

You will lead the Design Verification Applications Engineering team based in Hsinchu, Taiwan, focused on enabling customer success across the region. Your team works closely with R&D, sales, and global field teams to deliver technical solutions that help semiconductor companies adopt Synopsys verification tools and methodologies. This is a team that values technical depth, customer focus, and collaboration. You will have the opportunity to shape the team's direction, grow its capability, and build the next layer of technical leadership as the business scales.


Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.


At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.