Synopsys

• Understand IIP applications on customer specific SoC and systems
• Keep abreast of the latest ASIC/SoC design flows and EDA tools
• Provide expert advice and support to configure and resolve IIP integration challenges including simulation, synthesis, floorplan, STA, DFT, silicon bring-up, etc.
• Provide integration training to customers and conduct reviews on their major SoC milestones
• Provide feedback to Synopsys R&D for continuous IIP product improvements
• Participate in IIP R&D design reviews to align development with future customer needs 

• Bachelors and/or Masters Degree in Electrical and/or Electronic Engineering, Computer Engineering or Computer Science
• Minimum 5 years of IIP and/or ASIC Design/Verification/Applications experience required

• Hands-on experience on RTL coding in Verilog, simulation, synthesis, static timing analysis, equivalence check, etc. Experience on CDC/Lint, DFT are plus. 

• Domain knowledge in Display Protocol (HDMI/DP/MIPI DSI) is preferred but optional.

• Experienced with ASIC/SoC tape-out from concept to full production is desirable
• Silicon debug and troubleshooting skills are highly desirable

• Creative, results oriented with the ability to manage multiple tasks concurrently
• Good verbal and written communication skills in English and ability to interact with customers

• High degree of self-motivation and personal responsibility
• Strong analytical, reasoning and problem-solving skills, and attention to details

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.