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General Information

Job Title
HAPS Hardware Engineering, Sr Staff Engineer
Job ID
4596
Country
Taiwan
City
Hsinchu
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
Hardware Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
Job Description and Requirements
Synopsys is uniquely positioned to offer the most comprehensive prototyping solution in market today. HAPS system is the prototyping solution of Synopsys ASIC validation flow, it’s the industry’s performance & capacity leader in prototyping.
 
As a hardware designer, candidate will be primarily responsible for successful deployment of HAPS related board design including its validation. He or she will closely work with AE and customers to propose and design/validate protocol interface card solution on HAPS which can be a reference design kit.
 
Candidate will also help customer review HAPS daughter board schematics and layout. The position offers a great opportunity not only to grow by learning kinds of peripheral interface solution but also communication skills and project management capability from Synopsys.
  • Education Requirements
    • College degree(or above)  in Electrical Engineering/ Computer Science
  • Skills/Experience
    • Good team player and communication skills
    • Good experience on porting RTL to FPGA using Vivado or Synplify/Protocompiler/Protosynthesis or 3rd party FPGA synthesizer
    • Good expertise on 3rd parity FPGA prototyping platform like HAPS/S2C/TalentPros etc. with related FPGA compile/runtime/debug experience are preferred
    • Experience on hardware board design tools such as Orcad/PADS and Allegro
    • Familiar with  one of following protocols : MIPI/HDMI/AMBA/USB/PCIE/DDRx
    • Familiar with simulation and debug tools such as VCS and Verdi
    • Familiar with scripting language like Perl/Python/Tcl/CSH/BASH/Makefile
    • Fluent English on reading/writing (esp. technical spec)  
  • Nice to have 
    • Experience on multi FPGA partition with well timing constraint knowledge
    • Experience on Xilinx high speed IO application such as using GTH/GTY
    • Experience on Xilinx EDK development
    • Experience on Driver/FW/SOC FPGA debug/development

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.