Synopsys

Static Timing Analysis (STA) Internship

Introduction: We Are: Drive technology innovations that shape the way we live and connect. Our technology drives the Era of Pervasive Intelligence, where smart tech and AI are seamlessly woven into daily life. From self-driving cars and health-monitoring smartwatches to renewable energy systems that efficiently distribute clean power, Synopsys creates high-performance silicon chips that help build a healthier, safer, and more sustainable world.

Apprenticeship Experience: At Synopsys, Apprentice dive into real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide—and having fun in the process! You'll have the freedom to share your ideas, unleash your creativity, and explore your interests. This is your opportunity to bring your solutions to life and work with cutting-edge technology that shapes not only the future of innovation but also your own career path. Join us and start shaping your future today!

Mission Statement: Our mission is to fuel today’s innovations and spark tomorrow’s creativity. Together, we embrace a growth mindset, empower one another, and collaborate to achieve our shared goals. Every day, we live by our values of Integrity, Excellence, Leadership, and Passion, fostering an inclusive culture where everyone can thrive—both at work and beyond.

What You’ll Be Doing:

• Perform static timing analysis (STA) for high-performance designs such as DDR/LPDDR, HBM, and SOC.
• Drive timing closure activities to ensure IPs meet stringent timing, power, and area requirements.
• Implement engineering change orders (ECOs) to resolve functional bugs and timing issues.
• Ensure high quality and efficiency throughout the RTL2GDS implementation process.
• Work closely with global cross-functional teams and contribute automation solutions using scripting languages.

What You’ll Need:

• Fresh graduate from the class of 2025 (not currently enrolled in any M-Tech programs or postgraduate diplomas).
• Solid understanding and hands-on experience in static timing analysis, including chip-level timing closure and timing constraints.
• Experience handling asynchronous and multiple corner timing closure.
• Familiarity with tools such as PT, PTECO, and DMSA.
• Proficiency in scripting languages (Tcl and Python); experience with Perl and Shell scripting is a plus.
• Strong communication and effective presentation skills to collaborate with global teams.
• Limited prior internship experience is acceptable, no full-time employment at another company.

Key Program Facts:

• Program Length: 12 months
• Location: Hyderabad.
• Working Model: In-office work
• Full-Time/Part-Time: Full-Time.
• Start Date: March 2026

Equal Opportunity Statement: