Synopsys

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced and highly motivated professional with a strong background in analog and mixed-signal (A&MS) layout design. You thrive in a collaborative environment and possess a keen eye for detail and design integrity. Your technical expertise in using industry-standard EDA tools, coupled with your problem-solving abilities, makes you a valuable asset to any team. You have a deep understanding of semiconductor process technologies and their impact on layout design, and you are always eager to stay updated with the latest industry trends and advancements. With exceptional communication and interpersonal skills, you work effectively in team-oriented environments and contribute positively to the collective success.

What You’ll Be Doing:

• Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits.
• Create and optimize layout designs using industry-standard EDA tools.
• Perform physical verification and design rule checks to ensure design integrity and manufacturability.
• Participate in design reviews and provide feedback to improve design quality.
• Work closely with circuit designers to understand design specifications and constraints.
• Contribute to the development and enhancement of layout design methodologies and best practices.
• Stay updated with the latest industry trends and advancements in A&MS layout design.

The Impact You Will Have:

• Enhance the reliability and performance of our PVT sensor IPs through meticulous layout design.
• Ensure manufacturability and integrity of designs, avoiding costly errors in production.
• Contribute to the development of cutting-edge technologies in the semiconductor industry.
• Support the continuous improvement of design methodologies and best practices.
• Facilitate the integration of our IPs into SOC subsystems, aiding in the creation of high-performance silicon chips.
• Drive the technological innovations that keep Synopsys at the forefront of the industry.

What You’ll Need:

• Bachelor’s or master’s degree in electrical engineering or a related field.
• 3+ years of experience in A&MS layout design for integrated circuits.
• Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler.
• Exceptional knowledge of layout design methods, techniques, and methodologies.
• Experience with physical verification tools, such as Calibre or Assura.

Who You Are:

• An excellent problem-solver with systematic skills.
• A team player who works effectively in a collaborative environment.
• Detail-oriented with a strong focus on design integrity and quality.
• A proactive learner who stays updated with industry trends.
• An effective communicator with strong interpersonal skills.

The Team You’ll Be A Part Of:

You will be part of the rapidly expanding PVT IP group, which focuses on developing custom layout designs for Process, Voltage, Temperature, Current, and Droop sensors. Our team is dedicated to creating high-quality IPs that are integral to the Silicon lifecycle monitoring, ensuring the success and reliability of complex SOC subsystems.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.