Synopsys

Alternate Job Titles:

• Senior Staff Layout Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate, highly experienced layout design engineer who thrives at the intersection of technology leadership and hands-on technical execution. With a deep-rooted commitment to quality and innovation, you are adept at navigating the complexities of deep submicron CMOS, FinFET, and GAA process technologies. You possess a natural curiosity and drive to continuously learn, keeping yourself up to date with the latest industry advancements, particularly in advanced memory interface IP such as DDR and HBM. As a leader, you are motivated by mentoring and elevating your team, fostering a collaborative environment that encourages knowledge sharing and accountability. 

You are comfortable handling multi-faceted projects, from initial floorplanning to the final tape-out, and you have a proven ability to manage schedules, estimate efforts, and deliver best-in-class products on time. Your expertise spans across layout matching techniques, ESD protection, DFM, and advanced verification methodologies, enabling you to anticipate and solve complex challenges. You are recognized for your strong communication skills, both written and verbal, and you know how to clearly articulate technical concepts to cross-functional teams and customers alike. Your inclusive mindset ensures that you value diverse perspectives, and you champion an environment where everyone can contribute and grow. If you are ready to make a significant impact in shaping the next generation of silicon IP, Synopsys is the place for you.

What You’ll Be Doing:

• Leading the development of next-generation DDR and HBM PHY IP layout, spearheading innovation in advanced process nodes (7nm and below).
• Providing hands-on technical expertise across the entire layout process, including floorplanning, layout reviews, and release management.
• Mentoring, coaching, and guiding junior engineers to foster skill development and technical excellence within the team.
• Collaborating closely with cross-functional teams—including design, verification, and product engineering—to ensure seamless project execution and alignment with customer requirements.
• Driving continuous improvement in layout methodologies, quality assurance processes, and adherence to best practices in ESD, DFM, EMIR, PERC, and latch-up prevention.
• Managing project schedules, effort estimation, and delivery milestones to ensure high-quality, timely releases of IP products.
• Engaging in technical reviews, customer support, and documentation to ensure robust knowledge transfer and customer satisfaction.

The Impact You Will Have:

• Accelerating time-to-market for industry-leading SoCs by delivering high-quality, differentiated DDR and HBM PHY IP solutions.
• Enhancing Synopsys’ reputation as a leader in silicon IP through technical innovation and reliable project execution.
• Enabling customers to address complex integration, performance, and power challenges in advanced technology nodes.
• Improving product quality and robustness through rigorous layout verification, quality checks, and process optimization.
• Empowering the team through mentorship and technical leadership, building a culture of continuous learning and accountability.
• Contributing to the development of scalable, reusable layout methodologies that benefit the broader Synopsys product portfolio.
• Driving customer success by translating complex requirements into practical, high-performance layout solutions.

What You’ll Need:

• Bachelor’s or Master’s degree (BTech/MTech) in Electrical Engineering or related field.
• 8+ years of hands-on experience in analog/mixed-signal layout design, with a focus on advanced process nodes (7nm and below).
• Expertise in DDR and HBM PHY layout development, including deep knowledge of CMOS, FinFET, and GAA process technologies.
• Proficiency in layout matching techniques, ESD and latch-up prevention, DFM, LEF generation, and IO frame/bond-pad layout planning.
• Strong track record in project leadership, effort estimation, schedule planning, and cross-functional collaboration.
• Excellent problem-solving skills with a passion for technical innovation and continuous improvement.
• Outstanding written and verbal communication abilities, enabling effective knowledge sharing and stakeholder engagement.

Who You Are:

• Inclusive, collaborative, and open-minded, actively seeking diverse perspectives while fostering a supportive team culture.
• Accountable and results-driven, with a demonstrated ability to take ownership and deliver on commitments.
• Adaptable and resilient in a fast-paced, evolving technology landscape.
• Detail-oriented and quality-focused, with a commitment to excellence in all aspects of design and execution.  
• Empathetic mentor who enjoys developing others and contributing to a positive team environment.

The Team You’ll Be A Part Of:

You will join a dynamic, high-impact team at the forefront of silicon IP innovation, dedicated to delivering world-class memory interface solutions. Our team thrives on technical excellence, close collaboration, and a shared commitment to pushing the boundaries of what’s possible in chip design. You’ll work alongside talented engineers from diverse backgrounds, contributing to a culture that values learning, growth, and mutual support. Together, we drive the development of Synopsys’ cutting-edge DDR and HBM PHY IP that powers the next generation of smart devices.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.