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General Information

Job Title
Sr Staff Formal Verification Engineer
Job ID
7919
Country
India
City
Bangalore
Date Posted
21-Nov-2024
Job Category
Engineering
Job Subcategory
R&D Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a motivated and innovative engineer with a deep understanding of formal verification methodologies. You have a proven track record in deploying formal tools and techniques in the design verification flow for IPs and subsystems. Your approach to problem-solving is both analytical and creative, allowing you to identify inefficiencies and implement effective solutions. You thrive in collaborative environments, working seamlessly with cross-functional and global teams. You stay ahead of industry trends and continuously seek to enhance your expertise in formal verification, RTL design, and EDA tools. With over a decade of relevant experience, you bring robust technical knowledge and a passion for driving technological advancements in chip design and verification.

What You’ll Be Doing:

  • Build best-in-class verification methodologies and flows for high-performance IPs.
  • Identify inefficiencies and improvement opportunities in the front-end verification process and implement ideas to address them.
  • Responsible for usage of formal property verification methodology for multiple IPs and IP subsystems.
  • Deploy the latest formal verification tool capabilities for IP verification.
  • Work with cross-functional teams comprising of IP design teams and the VCS and Verdi RnD/PE teams.
  • Coordinate across multiple global design and tools teams.

The Impact You Will Have:

  • Enhance the efficiency and effectiveness of the verification process for high-performance IPs.
  • Drive innovation in formal verification methodologies, contributing to industry-leading verification solutions.
  • Ensure the robustness and reliability of IPs and subsystems through advanced formal property verification techniques.
  • Collaborate with global teams to streamline verification workflows and achieve consistent, high-quality outcomes.
  • Utilize cutting-edge formal verification tools to optimize verification processes and reduce time-to-market.
  • Contribute to the development of next-generation silicon chips, powering innovations in AI, IoT, and more.

What You’ll Need:

  • Industry experience in RTL design verification for ASICs, SoC, and IPs.
  • Experience deploying verification methodology using simulation-based technologies.
  • Proficiency in design verification technologies like UVM, simulation, formal, coverage collection, test planning, debugging, integration flows, and build/release flows.
  • Exposure to assertion-based verification (in simulation) and experience with formal verification tools, formal property verification testbenches, and verification signoff using formal.
  • Experience in HDL languages such as Verilog/SystemVerilog, VHDL, and scripting languages such as Python/Perl/TCL.
  • Experience in Electronic Design Automation (EDA) verification tools like VCS, Verdi, Spyglass, VC-Formal.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 10+ years of relevant experience.

Who You Are:

  • Analytical and creative problem-solver.
  • Excellent communicator and collaborator.
  • Proactive and self-driven with a passion for continuous learning.
  • Detail-oriented with a focus on quality and precision.
  • Adept at working in dynamic, fast-paced environments.

The Team You’ll Be A Part Of:

You will join a highly skilled and collaborative team dedicated to advancing formal verification methodologies. Our team works closely with IP design teams and the VCS and Verdi RnD/PE teams, fostering a culture of innovation and excellence. Together, we aim to push the boundaries of what is possible in chip design and verification, contributing to Synopsys' leadership in the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.