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General Information

Job Title
Senior IP verification, R&D Engineering, Sr Staff Engineer
Job ID
5714
Country
India
City
Bangalore
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
R&D Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
  • Experience : 7yrs to 12 years
  • Expertise in UVM and System Verilog
    Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage
  • Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies.
  • Protocol experience: Should have experience on PCIe/USB/MIPI/HDMI/Ethernet
  • Job responsibilities:
  • Able to contribute to the development of the VIP
  • Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective.
  • Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective
  • Locally should be to be “go-to” person on all technical aspects of VIP.


Need experience candidate on any of the protocol like PCIe, USB & UCIe.
Expertise in UVM and System Verilog
Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage
 

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.