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General Information

Job Title
HW Release Engineer, Staff / Sr Supervisor
Job ID
4558
Country
Armenia
City
Yerevan
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
R&D Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
Synopsys Mixed Signal Intellectual Property (MSIP) Products are used in electronic devices we use and access every day. As a Staff HW Release Engineer, you will play an important role which directly impacts the customer experience with the Synopsys MSIP products.

As a Staff HW Release Engineer, you will be responsible for generation of the customer-deliverable design kit packages for DDR, HBM, UCIE Physical Interface (PHY) and other MISP Products. Your responsibilities will include the building, checking, problem resolution, release note generation, verification, and general QA of the packages before they are released for customer use.

Responsibilities:
  • Supervise 4-6 junior engineers and interns. Provide clear direction, training, coaching, mentorship to team members and drive them to deliver in aggressive timelines
  • Oversee the entire Release process, including planning, scheduling, execution and closure
  • Continuously evaluate and optimize release processes and methodologies to enhance quality and efficiency.
  • The build and verification of DDR/HBM/UCIE PHY components and packages
  • Ensuring each DDR/HBM/UCIE PHY release package interoperates with the appropriate controller
  • Maintain Bill of Materials (BOM) for individual DDR/HBM/UCIE PHY components
  • Communicate effectively with stakeholders, providing regular updates on risks and issues to ensure timely debug and resolution of all problems which arise
  • Other related tasks such as developing scripts and other automations

Requirements:
  • BS or MS degree in Computer Science or Electrical Engineering with 5+ years of related experience
  • Previous experience in managing/supervision of engineering team
  • Working knowledge of models used in IP & SOC design (GDSII, LEF, LIB, Verilog, etc.)
  • Working knowledge of Synopsys design and verification tools such as VCS, DC, FC, etc. is an asset
  • Strong debugging and troubleshooting skills
  • Understanding of the analog and digital design flows
  • Working knowledge of UNIX/Linux operating systems
  • Scripting ability (bash, TCL, Perl, Python)
  • Good written and verbal English language skills

Personal Qualifications:
  • High level of leadership and accountability
  • Quick learner with the ability to learn new tools and processes
  • Excellent problem-solving and decision-making skills
  • Strong organizational skills with an attention to detail
  • Excellent teamwork and communication skills
  • Ability to work under pressure and meet tight deadlines

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.