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General Information

Job Title
R&D Engineer, Staff (PD, PnR, CTS)
Job ID
16679
Country
India
City
Bengaluru
Date Posted
27-Mar-2026
Job Category
Engineering
Job Subcategory
R&D Engineering
Hire Type
Employee

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.


Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities, and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.


You Are:

You are a talented, driven engineer with a passion for cutting-edge semiconductor technologies and a deep understanding of physical design flows. You thrive in fast-paced environments and enjoy tackling complex challenges, leveraging your experience in ASIC RTL2GDS implementation and signoff flows. Your technical expertise spans synthesis, static timing analysis, place & route, and layout closure, and you have a keen eye for optimizing performance, power, and area. You’re forward-thinking, constantly seeking ways to automate and improve processes, and you aren’t afraid to innovate or experiment with new methodologies.

Collaboration is at your core—you value teamwork and actively contribute to both internal and external projects, supporting your colleagues and mentoring junior engineers. Communication comes naturally to you, enabling you to articulate complex technical concepts clearly and effectively across diverse, global teams. With a strong foundation in scripting and custom flow development, you’re eager to enhance execution and efficiency. You bring curiosity, adaptability, and a commitment to continuous learning, ensuring you stay ahead of industry trends, especially as technology nodes advance to 16nm, 3nm, and beyond.

Above all, you believe in creating inclusive, innovative solutions that empower customers and drive the industry forward. You are excited by the opportunity to help shape the next generation of SLM IPs and subsystems, and you’re ready to be part of a team that values diversity, creativity, and excellence.


What You’ll Be Doing:

  • Designing and implementing physical design flows for SLM IPs and subsystems, including state-of-the-art SLM Controllers and on-chip Monitors.
  • Executing RTL2GDS flows on advanced process nodes (16nm to 3nm and beyond), ensuring robust performance and reliability.
  • Performing static timing analysis, synthesis, and layout closure using industry-leading EDA tools, preferably Synopsys PrimeTime, ICC2, Design Compiler, or Fusion Compiler. 
  • Collaborating with cross-functional teams to integrate soft and mixed-signal IPs, optimize design margins, and address high-frequency, multi-voltage, and low-power requirements.
  • Developing and enhancing automation scripts (TCL/PERL) to streamline design processes and improve execution efficiency.
  • Participating in project planning, execution, and mentoring, supporting both internal teams and external customers with technical expertise and guidance.
  • Contributing to the signoff and verification of designs, ensuring compliance with quality and reliability standards.


The Impact You Will Have:

  • Accelerate the integration and deployment of next-generation SLM products, enabling customers to bring differentiated solutions to market faster and with reduced risk.
  • Optimize semiconductor lifecycle management through innovative hardware IP, test, and analytics, enhancing performance, power, area, and yield.
  • Drive advancements in chip design and verification methodologies, supporting the evolution of process nodes and IP integration.  
  • Enhance reliability and scalability of technology products, contributing to breakthroughs in AI, IoT, automotive, and cloud sectors.
  • Empower global teams and customers with robust solutions, technical guidance, and effective collaboration.  
  • Support Synopsys' leadership in the Era of Smart Everything, powering the technologies that shape our connected world.


What You’ll Need:

  • Strong experience in standard ASIC RTL2GDS physical implementation and signoff flows.
  • Hands-on expertise in synthesis, pre-layout STA, post-layout STA, and CTS tools.  
  • BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience.  
  • Automation-focused mindset with proven experience in scripting (TCL/PERL) and custom flow development.
  • Exposure to soft and mixed-signal IPs, high-frequency/multi-voltage designs, and low-power methodologies.
  • Proficiency with EDA tools from any vendor, preferably Synopsys tools (PrimeTime, ICC2, Design Compiler, Fusion Compiler).
  • Solid understanding of OCV, POCV, derates, crosstalk, and design margins.
  • Experience in layout of digital blocks, timing constraints, STA, and timing closure.
  • Experience with PVT-sensors and/or DFT/DFx technologies is a strong plus.


Who You Are:

  • Collaborative and inclusive team player who values diversity and supports others.  
  • Excellent communicator, able to convey complex technical concepts clearly and effectively.
  • Mentor and leader, providing guidance and support to peers and junior engineers. 
  • Adaptable and innovative, eager to learn and embrace new technologies and methodologies.  
  • Self-motivated with strong project execution and planning skills.  
  • Customer-focused, dedicated to delivering high-quality solutions and support.


The Team You’ll Be A Part Of:

You’ll join the rapidly expanding Hardware-Analytics and Test (HAT) business unit as a member of the SLM Hardware Group (SHG). The team is dedicated to developing advanced SLM IPs and subsystems, leveraging expertise in backend and physical design to deliver robust, high-performance solutions. You’ll collaborate with talented engineers, researchers, and innovators from around the globe, working together to drive the future of semiconductor lifecycle management and shape the technologies powering the Era of Smart Everything.


Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.