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General Information

Job Title
R&D Engineering, Staff Engineer - IP Verification
Job ID
8112
Country
India
City
Bangalore
Date Posted
03-Dec-2024
Job Category
Engineering
Job Subcategory
R&D Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
  • Associated with Verification especially using industry-standard protocols & methodology
  • Languages: Hands-on experience with System Verilog & Verilog. Should have a good understanding of Object Oriented Programming.
  • Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies.
  • Protocol experience: Should have experience on UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol
  • Job responsibilities:
  • Able to contribute to the development of the VIP
  • Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective.
  • Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.