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General Information

Job Title
RTL Design Engineer (Fresh/Junior)
Job ID
5507
Country
Viet Nam
City
Ho Chi Minh
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
ASIC Digital Design
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
Responsibilities: 
  • Accountable to develop document and writing RTL for sub blocks that are part of the IP product.
  • Checking, report and fix issue of RTL by Lint tool.
  • Join with Verification team to work on the product's verification tasks.
  • Take part in On job training program from seniors. 
Requirements:
  • Bachelor's or Master's degree or above, major in Electrical, Electronic and Telecommunication Engineering, Computer Science, Automation and Control, Mechatronic Engineering or any other relevant.
    (Fresh graduate or under 2 years of experience in related IC Design is also welcomed and offered the on-the-job training to adapt the position's requirements.
  • Have knowledge about digital hardware components (AND, OR, XOR, NOT, latches, flipflop, etc.).
  • Have knowledge about Boolean algebra.
  • Have knowledge about Analog Mixed Signal is a plus.
  • Have knowledge about VCS, Verdi, Spyglass or similar tools is a plus.
  • Have knowledge about scripting skills (Perl, TCL, Python) is a plus.
  • Have ability for self-studying.
Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.