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General Information

Job Title
ASIC Verification Solution Lead:
Job ID
4619
Country
India
City
Bangalore
Date Posted
03-Sep-2024
Job Category
Engineering
Job Subcategory
SOC Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements
Duties
  • Understand Complete ASIC Design Verification Flow and Customize according to end Application.
  • Build a Complete Verification flow using an existing design from RTL to GDS.
  • Modify Methodology/Constraints to accommodate our Recommended Verification Flow
  • Define data trends and build checkers to validate the flow.
  • Automate Complete Solution, with self-monitoring trend analytics and Regression trends.
Required Qualifications
  • BS or MS degree in Computer Science, Electrical or Computer Engineering, or Related Field with 7+ years of experience
  • Knowledge of Digital design verification(Dynamic/Static),  Verilog/VHDL and associated verification tools.
  • Experience in Complete Verification Methodology and understand what’s needed from verification perspective to Signoff a design.
  • Proven HDL experience in SystemVerilog/HDL/SVA and UVM methodology
  • Software experience with Python/C++/TCL scripting knowledge

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.