Synopsys

Job Descriptions

Responsible for the development and implementation of SOC design using Synopsys EDA tools and IP (which include Synthesis, Physical design, STA, Physical Verification, IREM from spec to post-silicon bring-up)

Contribute to both turnkey project and as a trusted advisor to customer design and CAD team.

Develops innovative solution to problem with guidance and implements them independently.

Sets task level goals and consistently meets schedules.

Works with other Synopsys teams including BU AE and Sales to develop, broaden and deploy Tool and IP solution.

Locate in district 7, Ho Chi Minh city.

Skills Requirements:

BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications.

Hands on experience (9+ years) and good debugging skills on Place & Route domain using Fusion Compiler/ICC2 tool.

Able to manage other blocks owners operation.

Good understanding of P&R, extraction, timing, IREM and Physical Verification fundamentals.

Hands on experience on signoff tools like PT, Redhawk, StarRC, ICV will be an advantage.

Exposure to lower tech nodes

Good TCL/PERL understanding and scripting experience.

Able to guide junior team members technically and drive the technical things independently.

Able to communicate by English..

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.