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General Information

Job Title
Solutions Engineering, Sr Staff Engineer (DFT ,Verification, product Engineer)
Job ID
16130
Country
India
City
Bengaluru
Date Posted
10-Mar-2026
Job Category
Engineering
Job Subcategory
Solutions Engineering
Hire Type
Employee
Remote Eligible
No

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a dynamic engineer with working experience in RTL implementation, DFT, verification, flow automation and understanding of 3DIC solutions and UCIe protocols. You should have a passion for working with the best of the brains in the industry in developing end-to-end solutions and deploying them at our premier customer base. Your technical excellence and analytical skills, coupled with strong communication and interpersonal skills, make you an asset to any team. You excel in communication, teamwork, and multitasking, and have experience working in cross-functional, multi-site environments.

What You’ll Be Doing:

  • Working closely with a world-class R&D team, you’ll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM) and 3DIC technologies.
  • Working closely with customers, you will bring detailed requirements into the factory to enable R&D for strong, robust, and successful product development.
  • Working closely with product development team, you will validate an end-to-end solution both internally (before shipment) as well as in customer environment.
  • Driving the deployment and smooth execution of SLM solutions into customers’ projects.
  • Enabling customers to realize the value of silicon health monitoring in the context of 3DIC systems throughout the lifecycle of silicon bring-up, validation, through in-field operations.

The Impact You Will Have:

  • Enhancing Synopsys’ Silicon Lifecycle Management (SLM) and 3DIC solutions’ IP portfolio and end-to-end solution especially in the growing field of multi-die (3DIC) domain.
  • Driving the adoption of Synopsys’ SLM and 3DIC solutions at premier customer base worldwide.
  • Influencing the development of next-generation SLM IPs and solutions.

What You’ll Need:

  • BSEE/MSEE in Electrical Engineering, Computer Engineering, or related field.
  • 8 years of hands-on experience with RTL design and verification involving various D2D and PHY protocols, especially around UCIe and HBM.
  • Good exposure to JTAG IEEE 1149.1, IEEE  1687/1500, BIST/DFT mechanisms.
  • Experience working with 3D-IC/2.5D-IC solutions, knowledge of IEEE1838 and UCIe standards.
  • PCIe & USB protocol knowledge is a plus.
  • Debugging abilities to identify and resolve issues in functional verification in UVM environment.
  • Hands on experience in flow automation.
  • Knowledge of Synthesis is a must with understanding of timing constraints (SDC).
  • Knowledge of Lint, CDC, RDC is a plus.
  • Knowledge of physical implementation is not a must, but good to have.
  • Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions
  • Customer facing experience is a plus – educating/guiding customer on technical details of a solution 
  • Good to have: 
    • Hands-on bring-up and debug experience of silicon is a plus
    • Architecture/micro-architecture experience
    • Understanding of GenAI and Agentic AI workflows.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.