Synopsys

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in the trenches of analog layout, debugging DRC violations at 2am and closing LVS on complex mixed-signal blocks where every micron matters. The difference between a layout that tapes out and one that gets kicked back three times is usually something you would have caught in the first pass, and you are the kind of engineer who sees those things before they become problems.

You are comfortable sitting with a customer's design team walking through a failing verification deck, then turning around and writing a Tcl script that prevents that class of issue from happening again. When a foundry changes a rule deck or a designer hits a tool limitation, you do not just file a ticket, you reproduce it, isolate root cause, and drive it to closure with R&D while keeping the customer updated in plain language they can actually use.

You think in flows, not just features. You know that enablement is not about showing someone where the buttons are, it is about building a workflow they can trust and repeat. At Synopsys, you will work directly with leading-edge customers and foundries on advanced-node analog design, and what you build and solve will directly affect whether chips tape out on schedule.

What You'll Be Doing

• Lead technical enablement for Custom Compiler layout and verification flows with foundries and customer design teams, primarily on TSMC advanced nodes
• Reproduce and debug customer-reported issues across schematic, layout, verification, and automation workflows, isolating root cause and driving resolution with R&D through Jira and escalation channels
• Deliver hands-on training, workshops, and best-practice guidance to customer CAD and analog design teams, building trust through clear communication and technical ownership
• Develop and maintain flow automation using Tcl and Python to improve productivity, reduce turnaround time, and codify repeatable solutions for common design and verification challenges
• Produce validation reports, flow documentation, training decks, and status updates that translate technical depth into actionable guidance for customers and internal stakeholders
• Partner with PAE, FAE, product validation, R&D, and product management teams to translate field requirements into product improvements and prioritize work based on customer impact
• Build and maintain reusable automation templates, QA utilities, and AI-assisted workflows that scale support across multiple customer projects and advanced-node enablement efforts

The Impact You Will Have

• Enable faster tape-outs for customers designing on advanced TSMC nodes by delivering robust, validated Custom Compiler flows and resolving critical blockers before they delay schedules
• Reduce customer turnaround time and improve design quality through automation scripts and best-practice flows that eliminate repetitive manual work and common failure modes
• Strengthen foundry partnerships by serving as the technical bridge between Synopsys R&D and foundry enablement teams, ensuring PDK and flow readiness for new process nodes
• Improve product stability, performance, and quality by driving data-driven prioritization of customer escalations and feeding actionable insights back to engineering teams
• Build customer confidence and adoption of Custom Compiler through clear technical communication, responsive issue resolution, and training that makes complex workflows accessible
• Accelerate internal team efficiency by creating reusable collateral, automation templates, and AI-assisted tools that other solution engineers can leverage across regions and accounts
• Shape product roadmap and feature prioritization by translating real customer pain points into clear, prioritized requirements that R&D and product management can act on

What You'll Need

• 5+ years of hands-on analog layout experience with strong expertise in custom and analog IC implementation
• Solid working knowledge of Custom Compiler for schematic, layout, verification, and automation workflows
• Deep familiarity with analog design and custom signoff flows, including DRC and LVS debugging and closure
• Proficiency in Tcl and Python scripting for flow automation and productivity improvements
• Strong English communication skills for customer-facing technical discussions and written reporting
• Experience with TSMC advanced-node technologies and foundry enablement workflows is a strong plus
• Demonstrated ability to reproduce customer issues, isolate root cause, and drive resolution with engineering teams in a structured, data-driven way

Who You Are

• You can walk into a customer meeting, listen to a complex layout issue, and walk out with a clear reproduction case and a plan to fix it, not just a list of questions
• When a verification deck fails in a way that does not make sense, you dig into the runset, the PDK, and the design until you understand why, and then you document it so the next person does not have to
• You are comfortable saying "I do not know yet, but I will find out" and then actually following through with a clear answer and a timeline
• You treat every customer escalation like it matters, because you know that a blocked designer means a delayed tape-out, and a delayed tape-out means millions of dollars and months of schedule risk
• You can explain a technical tradeoff to a customer CAD manager in two sentences without losing the nuance, and you can turn that same conversation into a crisp Jira ticket that R&D can act on
• You build tools and scripts not just to solve today's problem, but to prevent tomorrow's, and you share them with the team instead of keeping them local

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.