Synopsys

Alternate Job Titles:

- Senior Digital Verification Engineer - Sr Staff ASIC Verification Engineer - Senior RTL Verification Engineer

We Are:

“At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.”

You Are:

An experienced and passionate ASIC Digital Verification Engineer with a deep understanding of RTL-based IP cores and complex protocols. You have over 12 years of experience in functional verification and are adept at making architectural decisions for test bench designs. You are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM), and you have a proven track record of implementing coverage-driven methodologies. You bring a wealth of knowledge in protocols such as DDR, PCIe, AMBA, and more. Your technical expertise is matched by your strong communication skills, ability to work independently, and your innovative problem-solving capabilities. Your experience may also include familiarity with functional safety standards such as ISO26262 and FMEDA.

What You’ll Be Doing:

• Making architectural decisions on test bench design.
• Writing verification plans and specifications.
• Implementing test bench infrastructure and writing test cases.
• Implementing a coverage-driven methodology.
• Leading technical aspects of verification projects.
• Collaborating with international teams of architects, designers, and verification engineers.

The Impact You Will Have:

• Enhancing the robustness and reliability of IP cores used in critical applications.
• Driving innovation in verification methodologies and tools.
• Ensuring high-quality deliverables through rigorous verification processes.
• Improving productivity, performance, and throughput of verification solutions.
• Contributing to the success of Synopsys' customers in industries such as AI, automotive, and server farms.
• Mentoring and guiding junior engineers in the verification domain.

What You’ll Need:

• Knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI.
• Hands-on experience with UVM/VMM/OVM, test planning, and coverage closure.
• Proficiency in SystemVerilog and UVM, object-oriented coding, and verification.
• Experience with scripting languages like C/C++, TCL, Perl, Python.
• Experience with functional safety standards such as ISO26262 and FMEDA (preferred).

Who You Are:

• Independent and precise in your work.
• Innovative and proactive in problem-solving.
• Excellent communicator and team player.
• Detail-oriented with a strong analytical mindset.
• Eager to learn and grow within a technical role.

The Team You’ll Be A Part Of:

You will join the Solutions Group at our Bangalore Design Center, India. This team is dedicated to developing functional verification solutions for IP cores used in various end-customer applications. You will work closely with architects, designers, and verification engineers across multiple international sites, fostering a collaborative and innovative environment.

Rewards and Benefits:

“We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.”

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.