Synopsys

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced analog design engineer, passionate about developing cutting-edge SerDes products and advancing high-speed chip-to-chip communications. With a strong grasp of CMOS technologies, you possess a solid background in analog and mixed-signal block design, particularly related to high-speed interfaces such as Drivers, Receivers, Clocking, and CDR. You thrive in collaborative environments, working closely with layout and cross-functional teams to optimize circuit performance, power, and area. Your analytical skills and problem-solving mindset enable you to tackle complex challenges and deliver reliable solutions. You communicate effectively in English, both in writing and verbally, and are comfortable using industry-standard IC design packages and UNIX operating systems. With at least five years of industry experience and a specialization in electronics, you’re eager to make a meaningful impact in industries ranging from mobile and automotive to cloud computing, AI, IoT, 5G, and storage. You value inclusion and diversity and are motivated to contribute to the innovations that power the Era of Smart Everything.

What You’ll Be Doing:

• Develop and/or validate analog circuits considering electrical specifications and reliability constraints.
• Document simulation results.
• Evaluate the impact of parasitic effects related to layout implementations. Work with the layout team to minimize such effects, improving performance, power, and area.
• Define and plan analog design activities.

The Impact You Will Have:

• Enable high-speed communications for leading-edge devices and systems across multiple industries.
• Help optimize circuit performance, power, and area for Synopsys’ silicon-proven SerDes products.
• Support the integration of advanced analog blocks into SoCs to meet unique application requirements.
• Minimize risk and accelerate time-to-market for differentiated customer products.
• Contribute to the continuous improvement of analog design methodologies and processes.
• Collaborate with a global, multicultural team to drive innovation in high-speed interface technologies.

What You’ll Need:

• Good understanding CMOS technologies
• Good analysis, problem-solving and organization skills
• Good working experience in analog and mixed-signal block design, preferably related to high speed SERDES (Drivers, Receivers, SERDES, Clocking, CDR)
• Good written and verbal communication in English
• Familiarity with one or more IC design packages
• Familiarity with UNIX operating Systems

Who You Are:

• Minimum 5-years’ industry experience
• Knowledge of analog CMOS circuit design, typically obtained through a specialization in Electronics (at the University), is preferred

The Team You’ll Be A Part Of:

You will be part of a fast-growing analog and mixed signal R&D team, developing high-speed analog integrated circuits in the most advanced FinFET/GAA process nodes. You’ll interact with a global, dynamic, multi-cultural and cross-functional design team, working together to deliver industry-leading SerDes IP solutions.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.